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- EPM240T100A5N
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EPM240T100A5N Tech Specifications
| Category | Embedded - CPLDs (Complex Programmable Logic Devices) | |
| Manufacturer | ALTERA | |
| Mounting Type | Surface Mount | |
| Package / Case | 100-TQFP | |
| Surface Mount | YES | |
| Supplier Device Package | 100-TQFP (14x14) | |
| Number of Terminals | 100Terminals | |
| Number of I/Os | 80I/Os | |
| Number of Macrocells | 192Macrocells | |
| Package Description | TFQFP, TQFP100,.63SQ | |
| Package Style | FLATPACK, THIN PROFILE, FINE PITCH | |
| Moisture Sensitivity Levels | 3 | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Equivalence Code | TQFP100,.63SQ | |
| Operating Temperature-Min | -40 °C | |
| Supply Voltage-Nom | 2.5 V | |
| Reflow Temperature-Max (s) | 40 | |
| Supply Voltage-Min | 2.375 V | |
| Operating Temperature-Max | 125 °C | |
| Rohs Code | Yes | |
| Manufacturer Part Number | EPM240T100A5N | |
| Package Code | TFQFP | |
| Package Shape | SQUARE | |
| Manufacturer | Intel Corporation | |
| Part Life Cycle Code | Active | |
| Number of I/O Lines | 80I/O Lines | |
| Samacsys Description | CPLD - Complex Programmable Logic Devices CPLD - MAX II 192 Macro 80 IOs | |
| Ihs Manufacturer | INTEL CORP | |
| Supply Voltage-Max | 2.625 V | |
| Risk Rank | 1.24 | |
| Operating Temperature | -40°C ~ 125°C (TJ) | |
| Series | MAX® II | |
| Packaging | Tray |
| JESD-609 Code | e3 | |
| Part Status | Active | |
| ECCN Code | EAR99 | |
| Terminal Finish | MATTE TIN (472) OVER COPPER | |
| Additional Feature | IT CAN ALSO OPERATE AT 3.3V | |
| HTS Code | 8542.39.00.01 | |
| Subcategory | Programmable Logic Devices | |
| Technology | CMOS | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 260 | |
| Terminal Pitch | 0.5 mm | |
| Reach Compliance Code | compliant | |
| Base Part Number | EPM240 | |
| JESD-30 Code | S-PQFP-G100 | |
| Qualification Status | Not Qualified | |
| Power Supplies | 1.5/3.3,2.5/3.3 V | |
| Temperature Grade | AUTOMOTIVE | |
| Programmable Type | In System Programmable | |
| Propagation Delay | 7.5 ns | |
| Organization | 0 DEDICATED INPUTS, 80 I/O | |
| Seated Height-Max | 1.2 mm | |
| Programmable Logic Type | FLASH PLD | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 192Macro Cells | |
| JTAG BST | YES | |
| Voltage Supply - Internal | 2.5V, 3.3V | |
| Delay Time tpd(1) Max | 4.7ns | |
| Number of Logic Elements/Blocks | 240Logic Elements/Blocks | |
| In-System Programmable | YES | |
| Width | 14 mm | |
| Length | 14 mm |
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