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EPM7256EGC192-20 Tech Specifications

Category Embedded - CPLDs (Complex Programmable Logic Devices)
Manufacturer ALTERA
Mounting Type Surface Mount
Package / Case 192-BPGA
Surface Mount NO
Supplier Device Package 192-PGA (44.7x44.7)
Number of Terminals 192Terminals
Number of I/Os 164I/Os
Number of Macrocells 256Macrocells
Package Description PGA, PGA192M,17X17
Package Style GRID ARRAY
Moisture Sensitivity Levels 1
Package Body Material CERAMIC, METAL-SEALED COFIRED
Package Equivalence Code PGA192M,17X17
Supply Voltage-Nom 5 V
Reflow Temperature-Max (s) 30
Supply Voltage-Min 4.75 V
Operating Temperature-Max 70 °C
Rohs Code No
Manufacturer Part Number EPM7256EGC192-20
Clock Frequency-Max 83.3 MHz
Package Code PGA
Package Shape SQUARE
Manufacturer Altera Corporation
Part Life Cycle Code Transferred
Number of I/O Lines 164I/O Lines
Ihs Manufacturer ALTERA CORP
Supply Voltage-Max 5.25 V
Risk Rank 3.79
Part Package Code PGA
Operating Temperature 0°C ~ 70°C (TA)
Series MAX® 7000
Packaging Tray
JESD-609 Code e0
Pbfree Code No
Part Status Obsolete
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position PERPENDICULAR
Terminal Form PIN/PEG
Peak Reflow Temperature (Cel) 220
Terminal Pitch 2.54 mm
Reach Compliance Code compliant
Base Part Number EPM7256
Pin Count 192
JESD-30 Code S-CPGA-P192
Qualification Status Not Qualified
Power Supplies 3.3/5,5 V
Temperature Grade COMMERCIAL
Programmable Type EE PLD
Propagation Delay 20 ns
Organization 0 DEDICATED INPUTS, 164 I/O
Seated Height-Max 5.43 mm
Programmable Logic Type EE PLD
Number of Gates 5000Gates
Output Function MACROCELL
Number of Macro Cells 256Macro Cells
JTAG BST NO
Voltage Supply - Internal 4.75 V ~ 5.25 V
Delay Time tpd(1) Max 20.0ns
Number of Logic Elements/Blocks 16Logic Elements/Blocks
In-System Programmable NO
Width 45.15 mm
Length 45.15 mm
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