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- EPXA1F672C1
ALTERA EPXA1F672C1 FPGAs with Microcontrollers
32-Bit ARM9 16K --
IN STOCK
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Min. : 1
Mult. : 1
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EPXA1F672C1 Tech Specifications
| Category | Embedded - FPGAs (Field Programmable Gate Array) with Microcontrollers | |
| Manufacturer | ALTERA | |
| Package / Case | SIP-6 | |
| Mounting Type | Surface Mount | |
| Surface Mount | YES | |
| Number of Pins | 6Pins | |
| Supplier Device Package | 672-FBGA (27x27) | |
| Number of Terminals | 672Terminals | |
| Factory Pack QuantityFactory Pack Quantity | 250 | |
| Manufacturer | CTS | |
| Brand | CTS Electronic Components | |
| RoHS | Details | |
| Package | Tray | |
| Mfr | Altera | |
| Product Status | Obsolete | |
| Package Description | BGA, | |
| Package Style | GRID ARRAY | |
| Moisture Sensitivity Levels | 3 | |
| Package Body Material | PLASTIC/EPOXY | |
| Supply Voltage-Nom | 1.8 V | |
| Supply Voltage-Min | 1.71 V | |
| Operating Temperature-Max | 85 °C | |
| Rohs Code | No | |
| Manufacturer Part Number | EPXA1F672C1 | |
| Package Code | BGA | |
| Package Shape | SQUARE | |
| Part Life Cycle Code | Active | |
| Number of I/O Lines | 246I/O Lines | |
| Ihs Manufacturer | ROCHESTER ELECTRONICS INC | |
| ak Reflow Temperature-Max (s) | NOT SPECIFIED | |
| Supply Voltage-Max | 1.89 V | |
| Risk Rank | 5.85 | |
| Part Package Code | BGA | |
| Series | 770 | |
| Packaging | Bulk | |
| Operating Temperature | 0°C ~ 85°C |
| JESD-609 Code | e0 | |
| Pbfree Code | No | |
| Part Status | Obsolete | |
| Terminal Finish | TIN LEAD | |
| Subcategory | Resistors | |
| Voltage - Supply | 1.8V | |
| Terminal Position | BOTTOM | |
| Terminal Form | BALL | |
| Peak Reflow Temperature (Cel) | 245 | |
| Terminal Pitch | 1 mm | |
| Reach Compliance Code | unknown | |
| Pin Count | 672 | |
| Termination Style | SIP | |
| JESD-30 Code | S-PBGA-B672 | |
| Qualification Status | COMMERCIAL | |
| Temperature Grade | OTHER | |
| Interface | EBI/EMI, UART/USART | |
| Speed | 266MHz | |
| Organization | 0 DEDICATED INPUTS, 246 I/O | |
| Circuit Type | Terminator, Dual | |
| Seated Height-Max | 2.1 mm | |
| Programmable Logic Type | LOADABLE PLD | |
| Product Type | Resistor Networks & Arrays | |
| EEPROM Size | -- | |
| Output Function | MACROCELL | |
| Core Type | 32-Bit ARM9 | |
| Product | Networks | |
| Product Category | Resistor Networks & Arrays | |
| Data SRAM Bytes | 16K | |
| FPGA Gates | 100K | |
| Program SRAM Bytes | 32K | |
| FPGA Core Cells | 4160 | |
| FPGA SRAM | -- | |
| Width | 27 mm | |
| Length | 27 mm |
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