Altera Corporation EPM7256MC208-25 Programmable Logic Devices
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EPM7256MC208-25 Tech Specifications
| Category | Embedded - PLDs (Programmable Logic Device) | |
| Manufacturer | ALTERA | |
| Surface Mount | YES | |
| Number of Terminals | 208Terminals | |
| Rohs Code | No | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | ALTERA CORP | |
| Part Package Code | QFP | |
| Package Description | FQFP, QFP208,1.2SQ,20 | |
| Clock Frequency-Max | 40 MHz | |
| Number of I/O Lines | 160I/O Lines | |
| Operating Temperature-Max | 70 °C | |
| Package Body Material | METAL | |
| Package Code | FQFP | |
| Package Equivalence Code | QFP208,1.2SQ,20 | |
| Package Shape | SQUARE | |
| Package Style | FLATPACK, FINE PITCH | |
| Supply Voltage-Max | 5.25 V | |
| Supply Voltage-Min | 4.75 V | |
| Supply Voltage-Nom | 5 V | |
| JESD-609 Code | e0 | |
| Terminal Finish | TIN LEAD |
| Additional Feature | 256 MACROCELLS; SHARED INPUT/CLOCK | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 220 | |
| Terminal Pitch | 0.5 mm | |
| Reach Compliance Code | compliant | |
| Pin Count | 208 | |
| JESD-30 Code | S-MQFP-G208 | |
| Qualification Status | Not Qualified | |
| Temperature Grade | COMMERCIAL | |
| Propagation Delay | 25 ns | |
| Organization | 0 DEDICATED INPUTS, 160 I/O | |
| Seated Height-Max | 3.96 mm | |
| Programmable Logic Type | OT PLD | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 256Macro Cells | |
| JTAG BST | NO | |
| In-System Programmable | NO | |
| Length | 27.69 mm | |
| Width | 27.69 mm |
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EPM7256MC208-25 Documents
Download datasheets and manufacturer documentation for EPM7256MC208-25
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