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EPM9560GI280-15 Tech Specifications
| Category | Embedded - PLDs (Programmable Logic Device) | |
| Manufacturer | ALTERA | |
| Surface Mount | NO | |
| Number of Terminals | 280Terminals | |
| Rohs Code | No | |
| Part Life Cycle Code | Transferred | |
| Ihs Manufacturer | ALTERA CORP | |
| Part Package Code | PGA | |
| Package Description | PGA, PGA280,19X19 | |
| Clock Frequency-Max | 117.6 MHz | |
| Moisture Sensitivity Levels | 1 | |
| Number of I/O Lines | 216I/O Lines | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Package Body Material | CERAMIC, METAL-SEALED COFIRED | |
| Package Code | PGA | |
| Package Equivalence Code | PGA280,19X19 | |
| Package Shape | SQUARE | |
| Package Style | GRID ARRAY | |
| Supply Voltage-Max | 5.5 V | |
| Supply Voltage-Min | 4.5 V | |
| Supply Voltage-Nom | 5 V | |
| JESD-609 Code | e0 | |
| Pbfree Code | No |
| ECCN Code | 3A991.D | |
| Terminal Finish | TIN LEAD | |
| Additional Feature | 560 MACROCELLS; 772 FLIP FLOPS; CONFIGURABLE I/O OPERATION - 3.3V OR 5V | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | PERPENDICULAR | |
| Terminal Form | PIN/PEG | |
| Peak Reflow Temperature (Cel) | 220 | |
| Terminal Pitch | 2.54 mm | |
| Reach Compliance Code | compliant | |
| Pin Count | 280 | |
| JESD-30 Code | S-CPGA-P280 | |
| Qualification Status | Not Qualified | |
| Temperature Grade | INDUSTRIAL | |
| Propagation Delay | 16.6 ns | |
| Organization | 0 DEDICATED INPUTS, 216 I/O | |
| Seated Height-Max | 5.08 mm | |
| Programmable Logic Type | EE PLD | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 560Macro Cells | |
| JTAG BST | YES | |
| In-System Programmable | YES | |
| Length | 49.78 mm | |
| Width | 49.78 mm |
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EPM9560GI280-15 Documents
Download datasheets and manufacturer documentation for EPM9560GI280-15
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