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ADCLK914BCPZ-R2 Tech Specifications
Category | Clock/Timing - Clock Buffers, Drivers | |
Manufacturer | ||
Lifecycle Status | PRODUCTION (Last Updated: 1 month ago) | |
Factory Lead Time | 8 Weeks | |
Mount | Surface Mount | |
Mounting Type | Surface Mount | |
Package / Case | 16-VFQFN Exposed Pad, CSP | |
Number of Pins | 16Pins | |
Operating Temperature | -40°C~125°C | |
Packaging | Tape & Reel (TR) | |
Series | SiGe | |
JESD-609 Code | e3 | |
Pbfree Code | no | |
Part Status | Active | |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
Number of Terminations | 16Terminations | |
ECCN Code | EAR99 | |
Type | Buffer/Driver, Data | |
Terminal Finish | MATTE TIN | |
Voltage - Supply | 2.97V~3.63V | |
Terminal Position | QUAD | |
Peak Reflow Temperature (Cel) | 260 | |
Number of Functions | 1Function | |
Supply Voltage | 3.3V |
Terminal Pitch | 0.5mm | |
Frequency | 7.5GHz | |
Time@Peak Reflow Temperature-Max (s) | 40 | |
Base Part Number | ADCLK914 | |
Output | HVDS | |
Pin Count | 16 | |
Number of Outputs | 1Output | |
Operating Supply Voltage | 3.3V | |
Nominal Supply Current | 55mA | |
Max Supply Current | 73mA | |
Propagation Delay | 202 ps | |
Turn On Delay Time | 202 ps | |
Input | CML, CMOS, LVDS, LVPECL, LVTTL | |
Ratio - Input:Output | 1:1 | |
Supply Voltage Limit-Max | 6V | |
Differential - Input:Output | Yes/Yes | |
Height | 900μm | |
Length | 3mm | |
Width | 3mm | |
REACH SVHC | No SVHC | |
Radiation Hardening | No | |
RoHS Status | ROHS3 Compliant | |
Lead Free | Contains Lead |
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ADCLK914BCPZ-R2 Documents
Download datasheets and manufacturer documentation for ADCLK914BCPZ-R2
- DatasheetsADCLK914
- PCN OtherMultiple Changes 13/Feb/2014
- ConflictMineralStatementAnalog-Devices-company-33.pdf
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