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- HMC7043LP7FETR
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HMC7043LP7FETR Tech Specifications
| Category | Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers | |
| Manufacturer | ||
| Lifecycle Status | PRODUCTION (Last Updated: 3 weeks ago) | |
| Factory Lead Time | 8 Weeks | |
| Mounting Type | Surface Mount | |
| Package / Case | 48-VFQFN Exposed Pad, CSP | |
| Surface Mount | YES | |
| Number of Pins | 48Pins | |
| Frequency(Max) | 3.2GHz | |
| Operating Temperature | -40°C~85°C | |
| Packaging | Tape & Reel (TR) | |
| JESD-609 Code | e4 | |
| Pbfree Code | no | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 48Terminations | |
| Type | Clock Buffer | |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
| Additional Feature | ALSO OPERATED AS SERIAL INPUT AND OUTPUT | |
| Voltage - Supply | 3.135V~3.465V | |
| Terminal Position | QUAD | |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 | |
| Number of Functions | 1Function | |
| Supply Voltage | 3.3V | |
| Terminal Pitch | 0.5mm | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | HMC7043 | |
| Output | CMOS, LVDS, LVPECL | |
| Pin Count | 48 | |
| Supply Voltage-Max (Vsup) | 3.465V | |
| Number of Circuits | 1Circuit | |
| Input | Clock | |
| Ratio - Input:Output | 1:14 | |
| PLL | Yes | |
| Differential - Input:Output | Yes/Yes | |
| Propagation Delay (tpd) | 0.87 ns | |
| Divider/Multiplier | Yes/No | |
| Length | 7mm | |
| Height Seated (Max) | 0.9mm | |
| Width | 7mm | |
| RoHS Status | ROHS3 Compliant | |
| Lead Free | Contains Lead |
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HMC7043LP7FETR Documents
Download datasheets and manufacturer documentation for HMC7043LP7FETR
- DatasheetsHMC7043
- Other Related DocumentsClock Skew in Large Multi-GHz Clock Trees
- ConflictMineralStatementAnalog-Devices-company-33.pdf
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