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CY7B992-7JC Tech Specifications
| Category | Clock/Timing - Clock Buffers, Drivers | |
| Manufacturer | Cypress | |
| Contact Plating | Lead, Tin | |
| Package / Case | PLCC | |
| Surface Mount | YES | |
| Number of Pins | 32Pins | |
| Packaging | Bulk | |
| Published | 2007 | |
| JESD-609 Code | e0 | |
| Pbfree Code | no | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 32Terminations | |
| ECCN Code | EAR99 | |
| Terminal Finish | TIN LEAD | |
| Max Operating Temperature | 70°C | |
| Min Operating Temperature | 0°C | |
| Terminal Position | QUAD | |
| Terminal Form | J BEND | |
| Peak Reflow Temperature (Cel) | 220 | |
| Number of Functions | 4Functions | |
| Supply Voltage | 5V | |
| Terminal Pitch | 1.27mm | |
| Frequency | 80MHz |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED | |
| Pin Count | 32 | |
| Number of Outputs | 8Outputs | |
| Qualification Status | Not Qualified | |
| Operating Supply Voltage | 5V | |
| Power Supplies | 5V | |
| Temperature Grade | COMMERCIAL | |
| Max Supply Voltage | 5.5V | |
| Min Supply Voltage | 4.5V | |
| Max Supply Current | 90mA | |
| Family | 7B | |
| Logic IC Type | PLL BASED CLOCK DRIVER | |
| Max I(ol) | 0.046 A | |
| Prop. Delay@Nom-Sup | 0.7 ns | |
| Propagation Delay (tpd) | 0.7 ns | |
| Same Edge Skew-Max (tskwd) | 1.5 ns | |
| Input Conditioning | STANDARD | |
| Height | 3.556mm | |
| Length | 11.51mm | |
| Width | 14.0462mm | |
| RoHS Status | Non-RoHS Compliant | |
| Lead Free | Contains Lead |
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CY7B992-7JC Documents
Download datasheets and manufacturer documentation for CY7B992-7JC
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