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DMN32D2LV-7 Tech Specifications

Category Transistors - FETs, MOSFETs - Arrays
Manufacturer Diodes
Factory Lead Time 16 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case SOT-563, SOT-666
Weight 3.005049mg
Transistor Element Material SILICON
Number of Elements 2 Elements
Operating Temperature -55°C~150°C TJ
Packaging Tape & Reel (TR)
Published 2012
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6Terminations
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Power Dissipation 400mW
Terminal Form FLAT
Peak Reflow Temperature (Cel) 260
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number DMN32D2LV
Pin Count 6
JESD-30 Code R-PDSO-F6
Number of Channels 2Channels
Element Configuration Dual
Operating Mode ENHANCEMENT MODE
FET Type 2 N-Channel (Dual)
Transistor Application SWITCHING
Rds On (Max) @ Id, Vgs 1.2 Ω @ 100mA, 4V
Vgs(th) (Max) @ Id 1.2V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds 39pF @ 3V
Drain to Source Voltage (Vdss) 30V
Continuous Drain Current (ID) 400mA
Gate to Source Voltage (Vgs) 10V
Drain Current-Max (Abs) (ID) 0.4A
Drain to Source Breakdown Voltage 30V
FET Technology METAL-OXIDE SEMICONDUCTOR
FET Feature Logic Level Gate
Height 600μm
Length 1.6mm
Width 1.2mm
REACH SVHC No SVHC
Radiation Hardening No
RoHS Status ROHS3 Compliant
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DMN32D2LV-7 Documents

Download datasheets and manufacturer documentation for   DMN32D2LV-7

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