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IPG20N06S4L11ATMA1 Tech Specifications

Category Transistors - FETs, MOSFETs - Arrays
Manufacturer Infineon
Factory Lead Time 12 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-PowerVDFN
Number of Pins 8Pins
Transistor Element Material SILICON
Number of Elements 2 Elements
Turn Off Delay Time 58 ns
Operating Temperature -55°C~175°C TJ
Packaging Tape & Reel (TR)
Series Automotive, AEC-Q101, OptiMOS™
Published 2003
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8Terminations
ECCN Code EAR99
Terminal Finish Tin (Sn)
Additional Feature LOGIC LEVEL COMPATIBLE
Max Power Dissipation 65W
Terminal Form FLAT
Peak Reflow Temperature (Cel) NOT SPECIFIED
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Configuration SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
Operating Mode ENHANCEMENT MODE
Turn On Delay Time 11 ns
Power - Max 65W
FET Type 2 N-Channel (Dual)
Rds On (Max) @ Id, Vgs 11.2m Ω @ 17A, 10V
Vgs(th) (Max) @ Id 2.2V @ 28μA
Halogen Free Halogen Free
Input Capacitance (Ciss) (Max) @ Vds 4020pF @ 25V
Gate Charge (Qg) (Max) @ Vgs 53nC @ 10V
Rise Time 3ns
Fall Time (Typ) 19 ns
Continuous Drain Current (ID) 20A
Gate to Source Voltage (Vgs) 16V
Max Dual Supply Voltage 60V
Drain-source On Resistance-Max 0.0112Ohm
Avalanche Energy Rating (Eas) 165 mJ
FET Technology METAL-OXIDE SEMICONDUCTOR
FET Feature Logic Level Gate
RoHS Status ROHS3 Compliant
Lead Free Contains Lead
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IPG20N06S4L11ATMA1 Documents

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