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IDT7201SA50J Tech Specifications

Category Logic - FIFOs Memory
Manufacturer IDT
Surface Mount YES
Number of Terminals 32Terminals
Rohs Code No
Part Life Cycle Code Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code QFJ
Package Description PLASTIC, LCC-32
Access Time-Max 50 ns
Moisture Sensitivity Levels 1
Number of Words 512 wordsWord
Number of Words Code 512Words Codes
Operating Temperature-Max 70 °C
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC32,.5X.6
Package Shape RECTANGULAR
Package Style CHIP CARRIER
Supply Voltage-Nom (Vsup) 5 V
JESD-609 Code e0
ECCN Code EAR99
Terminal Finish TIN LEAD
Additional Feature RETRANSMIT
HTS Code 8542.32.00.71
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 225
Number of Functions 1Function
Terminal Pitch 1.27 mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 20
Pin Count 32
JESD-30 Code R-PQCC-J32
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 5.5 V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.5 V
Operating Mode ASYNCHRONOUS
Supply Current-Max 0.125 mA
Organization 512X9
Output Characteristics 3-STATE
Memory Width 9
Memory Density 4608 bit
Parallel/Serial PARALLEL
Memory IC Type OTHER FIFO
Output Enable NO
Cycle Time 65 ns
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IDT7201SA50J Documents

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  • Datasheets
IDT7201SA50J brand manufacturers: Integrated Device Technology Inc, Elecinsight stock, IDT7201SA50J reference price.Integrated Device Technology Inc. IDT7201SA50J parameters, IDT7201SA50J Datasheet PDF and pin diagram description download.You can use the IDT7201SA50J Logic - FIFOs Memory, DSP Datesheet PDF, find IDT7201SA50J pin diagram and circuit diagram and usage method of function,IDT7201SA50J electronics tutorials.You can download from the Elecinsight.