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IDT74LVC74APG Tech Specifications

Category Logic - Latches
Manufacturer IDT
Surface Mount YES
Number of Terminals 14Terminals
Rohs Code No
Part Life Cycle Code Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code TSSOP
Package Description TSSOP, TSSOP14,.25
Load Capacitance (CL) 50 pF
Moisture Sensitivity Levels 1
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Equivalence Code TSSOP14,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Supply Voltage-Nom (Vsup) 3.3 V
JESD-609 Code e0
Terminal Finish TIN LEAD
HTS Code 8542.39.00.01
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 240
Number of Functions 2Functions
Terminal Pitch 0.65 mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 14
JESD-30 Code R-PDSO-G14
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6 V
Temperature Grade INDUSTRIAL
Supply Voltage-Min (Vsup) 2.7 V
Number of Bits 1Bit
Family LVC/LCX/Z
Output Characteristics 3-STATE
Seated Height-Max 1.2 mm
Output Polarity COMPLEMENTARY
Logic IC Type D FLIP-FLOP
Max I(ol) 0.024 A
Prop. Delay@Nom-Sup 5.2 ns
Trigger Type POSITIVE EDGE
Propagation Delay (tpd) 6 ns
fmax-Min 100 MHz
Max Frequency@Nom-Sup 100000000 Hz
Length 5 mm
Width 4.4 mm
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IDT74LVC74APG Documents

Download datasheets and manufacturer documentation for   IDT74LVC74APG

  • Datasheets
IDT74LVC74APG brand manufacturers: Integrated Device Technology Inc, Elecinsight stock, IDT74LVC74APG reference price.Integrated Device Technology Inc. IDT74LVC74APG parameters, IDT74LVC74APG Datasheet PDF and pin diagram description download.You can use the IDT74LVC74APG Logic - Latches, DSP Datesheet PDF, find IDT74LVC74APG pin diagram and circuit diagram and usage method of function,IDT74LVC74APG electronics tutorials.You can download from the Elecinsight.