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- EP2S180F1020C3N
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EP2S180F1020C3N Tech Specifications
Category | Embedded - FPGAs (Field Programmable Gate Array) | |
Manufacturer | Intel | |
Factory Lead Time | 8 Weeks | |
Mounting Type | Surface Mount | |
Package / Case | 1020-BBGA | |
Surface Mount | YES | |
Number of I/Os | 742I/Os | |
Operating Temperature | 0°C~85°C TJ | |
Packaging | Tray | |
Series | Stratix® II | |
JESD-609 Code | e1 | |
Part Status | Active | |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
ECCN Code | 3A001.A.7.A | |
Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
HTS Code | 8542.39.00.01 | |
Voltage - Supply | 1.15V~1.25V | |
Terminal Position | BOTTOM | |
Terminal Form | BALL | |
Peak Reflow Temperature (Cel) | 245 |
Supply Voltage | 1.2V | |
Terminal Pitch | 1mm | |
Time@Peak Reflow Temperature-Max (s) | 40 | |
Base Part Number | EP2S180 | |
JESD-30 Code | S-PBGA-B1020 | |
Number of Outputs | 734Outputs | |
Qualification Status | Not Qualified | |
Power Supplies | 1.21.5/3.33.3V | |
Clock Frequency | 717MHz | |
Number of Inputs | 742Inputs | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Number of Logic Elements/Cells | 179400Logic Elements/Cells | |
Total RAM Bits | 9383040 | |
Number of LABs/CLBs | 8970LABs/CLBs | |
Combinatorial Delay of a CLB-Max | 4.672 ns | |
Length | 33mm | |
Height Seated (Max) | 3.5mm | |
Width | 33mm | |
RoHS Status | RoHS Compliant |
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EP2S180F1020C3N Documents
Download datasheets and manufacturer documentation for EP2S180F1020C3N
- DatasheetsStratix II Device Handbook, Volume1 Stratix II Device Handbook 896-FBGA Pkg Info Virtual JTAG Megafuntion User Guide
- PCN PackagingMult Dev Label CHG 24/Jan/2020 Mult Dev Dessicant Chg 19/Jul/2019 All Dev Pkg Chg 1/Aug/2018 Mult Dev Label Chgs 24/Feb/2020
- PCN Assembly/OriginMult Devices Assembly Site 19/Apr/2019
- PCN Obsolescence/ EOLMult Dev Add Subs 6/Sep/2019
- PCN OtherReadiness Plan Rev 6/Sep/2019
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