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A2F500M3G-1FG256 Tech Specifications

Category Embedded - System On Chip (SoC)
Manufacturer Microchip
Package / Case FPBGA-256
Surface Mount YES
Supplier Device Package 256-FPBGA (17x17)
Number of Terminals 256Terminals
Shipping Restrictions This product may require additional documentation to export from the United States.
RoHS N
Mounting Styles SMD/SMT
Core ARM Cortex M3
Maximum Clock Frequency 100 MHz
L1 Cache Instruction Memory -
L1 Cache Data Memory -
Data RAM Size 64 kB
Number of Logic Elements 6000 LELogic Element
Number of I/Os 117 I/OI/O
Minimum Operating Temperature 0 C
Maximum Operating Temperature + 85 C
Moisture Sensitive Yes
Number of Logic Array Blocks - LABs -Logic Array Blocks - LAB
Factory Pack QuantityFactory Pack Quantity 90
Tradename SmartFusion
Typical Operating Supply Voltage 1.5000 V
Minimum Operating Supply Voltage 1.425 V
Maximum Operating Supply Voltage 1.575 V
Package Tray
Base Product Number A2F500
Mfr Microchip Technology
Product Status Active
Package Description 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256
Package Style GRID ARRAY, LOW PROFILE
Moisture Sensitivity Levels 3
Package Body Material PLASTIC/EPOXY
Package Equivalence Code BGA256,16X16,40
Supply Voltage-Nom 1.5 V
Reflow Temperature-Max (s) 30
Supply Voltage-Min 1.425 V
Operating Temperature-Max 85 °C
Rohs Code No
Manufacturer Part Number A2F500M3G-1FG256
Clock Frequency-Max 100 MHz
Package Code LBGA
Package Shape SQUARE
Part Life Cycle Code Active
Ihs Manufacturer MICROSEMI CORP
Supply Voltage-Max 1.575 V
Risk Rank 5.24
Packaging Tray
Series A2F500
Operating Temperature 0 to 85 °C
Terminal Finish TIN LEAD/TIN LEAD SILVER
HTS Code 8542.39.00.01
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 225
Terminal Pitch 1 mm
Reach Compliance Code compliant
JESD-30 Code S-PBGA-B256
Number of Outputs 66Outputs
Qualification Status Not Qualified
Power Supplies 1.5,1.8,2.5,3.3 V
Temperature Grade OTHER
Speed 100MHz
RAM Size 64KB
Core Processor ARM® Cortex®-M3
Peripherals DMA, POR, WDT
Program Memory Size 512 kB
Connectivity EBI/EMI, Ethernet, I²C, SPI, UART/USART
Architecture MCU, FPGA
Number of Inputs 66Inputs
Organization 11520 CLBS, 500000 GATES
Seated Height-Max 1.7 mm
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Gates 500000Gates
Speed Grade 1
Primary Attributes ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops
Number of CLBs 11520CLBs
Number of Logic Cells 11520Logic Cells
Number of Cores 1 CoreCore
Number of Equivalent Gates 500000Equivalent Gates
Flash Size 512KB
Width 17 mm
Length 17 mm
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