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- HEF4050BP,652
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HEF4050BP,652 Tech Specifications
| Category | Logic - Specialty Logic | |
| Manufacturer | Nexperia | |
| PCB changed | 16 | |
| Package Width | 6.48(Max) | |
| Package Length | 19.5(Max) | |
| Package Height | 3.2(Max) | |
| Mounting | Through Hole | |
| Supplier Package | PDIP | |
| Supplier Temperature Grade | Industrial | |
| Maximum Operating Temperature (°C) | 85 | |
| Minimum Operating Temperature (°C) | -40 | |
| Maximum Power Dissipation (mW) | 750 | |
| Propagation Delay Test Condition (pF) | 50 | |
| Maximum Quiescent Current (uA) | 16 | |
| Maximum Operating Supply Voltage (V) | 15 | |
| Typical Operating Supply Voltage (V) | 9|5|12|3.3 | |
| Minimum Operating Supply Voltage (V) | 3 | |
| Maximum High Level Output Current (mA) | -3.6 | |
| Maximum Low Level Output Current (mA) | 24(Min) |
| Input Signal Type | Single-Ended | |
| Process Technology | CMOS | |
| Absolute Propagation Delay Time (ns) | 110 | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 55@10V|110@5V|40@15V | |
| Bus Hold | No | |
| Number of Output Enables per Chip | 0 | |
| Number of Outputs per Chip | 6Outputs per Chips | |
| Number of Input Enables per Chip | 0 | |
| ECCN (US) | EAR99 | |
| Logic Family | HEF4000 | |
| Number of Inputs per Chip | 6Inputs per Chips | |
| Number of Channels per Chip | 6Channels per Chips | |
| Number of Elements per Chip | 6Elements per Chips | |
| Packaging | Bulk | |
| Part Status | Obsolete | |
| Pin Count | 16 | |
| Polarity | Non-Inverting | |
| Logic Function | Buffer/Converter | |
| RoHS Status | RoHS Compliant |
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HEF4050BP,652 Documents
Download datasheets and manufacturer documentation for HEF4050BP,652
- datasheetsnexperia-hef4050bp652-datasheets-6126.pdf
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