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- 74LVC2G02GD,125
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74LVC2G02GD,125 Tech Specifications
| Category | Logic - Gates and Inverters | |
| Manufacturer | Nexperia | |
| Factory Lead Time | 8 Weeks | |
| Contact Plating | Gold | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 8-XFDFN | |
| Number of Pins | 8Pins | |
| Logic Level-High | 1.7V ~ 2V | |
| Logic Level-Low | 0.7V ~ 0.8V | |
| Operating Temperature | -40°C~125°C | |
| Packaging | Tape & Reel (TR) | |
| Series | 74LVC | |
| Published | 2013 | |
| JESD-609 Code | e4 | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 8Terminations | |
| Packing Method | TAPE AND REEL | |
| Voltage - Supply | 1.65V~5.5V | |
| Terminal Position | DUAL | |
| Peak Reflow Temperature (Cel) | 260 | |
| Number of Functions | 2Functions | |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | 74LVC2G02 | |
| Pin Count | 8 | |
| Supply Voltage-Max (Vsup) | 5.5V | |
| Power Supplies | 3.3V | |
| Load Capacitance | 50pF | |
| Propagation Delay | 1.8 ns | |
| Quiescent Current | 40μA | |
| Turn On Delay Time | 3.2 ns | |
| Family | LVC/LCX/Z | |
| Logic Function | NOR | |
| Logic Type | NOR Gate | |
| Max Propagation Delay @ V, Max CL | 4.3ns @ 5V, 50pF | |
| Schmitt Trigger | NO | |
| Number of Input Lines | 2Input Lines | |
| Number of Output Lines | 1Output Line | |
| Current - Quiescent (Max) | 4μA | |
| Length | 3mm | |
| Height Seated (Max) | 0.5mm | |
| Radiation Hardening | No | |
| RoHS Status | RoHS Compliant | |
| Lead Free | Lead Free |
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74LVC2G02GD,125 Documents
Download datasheets and manufacturer documentation for 74LVC2G02GD,125
- PCN PackagingLogo 10/Dec/2016 Pack/Label Update 30/Nov/2016
- Datasheets74LVC2G02
- PCN Obsolescence/ EOLMid-Year Product Disc 30/Jun/2017
- PCN Assembly/OriginAssembly Site Addition 12/Sep/2015
- RohsStatementNXP-Semiconductors-company-12.pdf
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