NXP Semiconductors 74AUP1G09GW Logic Gates
1Function
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74AUP1G09GW Tech Specifications
| Category | Logic - Gates and Inverters | |
| Manufacturer | pSemi | |
| Surface Mount | YES | |
| Number of Terminals | 5Terminals | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Transferred | |
| Ihs Manufacturer | NXP SEMICONDUCTORS | |
| Part Package Code | TSSOT | |
| Package Description | TSSOP, TSSOP5/6,.08 | |
| Load Capacitance (CL) | 30 pF | |
| Moisture Sensitivity Levels | 1 | |
| Operating Temperature-Max | 125 °C | |
| Operating Temperature-Min | -40 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | TSSOP | |
| Package Equivalence Code | TSSOP5/6,.08 | |
| Package Shape | RECTANGULAR | |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
| Supply Voltage-Nom (Vsup) | 1.1 V | |
| JESD-609 Code | e3 | |
| Pbfree Code | Yes | |
| Terminal Finish | Tin (Sn) | |
| HTS Code | 8542.39.00.01 | |
| Packing Method | TR |
| Terminal Position | DUAL | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 260 | |
| Number of Functions | 1Function | |
| Terminal Pitch | 0.65 mm | |
| Reach Compliance Code | compliant | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Pin Count | 5 | |
| JESD-30 Code | R-PDSO-G5 | |
| Qualification Status | Not Qualified | |
| Supply Voltage-Max (Vsup) | 3.6 V | |
| Temperature Grade | AUTOMOTIVE | |
| Supply Voltage-Min (Vsup) | 0.8 V | |
| Family | AUP/ULP/V | |
| Number of Inputs | 2Inputs | |
| Output Characteristics | OPEN-DRAIN | |
| Seated Height-Max | 1.1 mm | |
| Logic IC Type | AND GATE | |
| Max I(ol) | 0.0017 A | |
| Prop. Delay@Nom-Sup | 24 ns | |
| Propagation Delay (tpd) | 24 ns | |
| Schmitt Trigger | YES | |
| Length | 2.05 mm | |
| Width | 1.25 mm |
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74AUP1G09GW Documents
Download datasheets and manufacturer documentation for 74AUP1G09GW
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