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74LVT16373ADGG,512 Tech Specifications

Category Latches, Locks
Manufacturer NXP
ECCN (US) EAR99
Logic Family LVT
Latch Mode Transparent
Number of Channels per Chip 16Channels per Chips
Number of Elements per Chip 2Elements per Chips
Number of Inputs per Chip 16Inputs per Chips
Number of Input Enables per Element 1
Number of Selection Inputs per Element 0
Number of Outputs per Chip 16Outputs per Chips
Number of Output Enables per Element 1
Bus Hold Yes
Set/Reset No
Maximum Propagation Delay Time @ Maximum CL (ns) 1.9(Typ)@3.3V
Absolute Propagation Delay Time (ns) 5.4
Process Technology BiCMOS
Maximum Low Level Output Current (mA) 64
Maximum High Level Output Current (mA) -32
Minimum Operating Supply Voltage (V) 2.7
Typical Operating Supply Voltage (V) 3.3
Maximum Operating Supply Voltage (V) 3.6
Typical Quiescent Current (uA) 4000
Maximum Quiescent Current (uA) 6000
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 85
Supplier Package TSSOP
Mounting Surface Mount
Package Height 1.05(Max)
Package Length 12.6(Max)
Package Width 6.2(Max)
PCB changed 48
Packaging Tube
Part Status Obsolete
Type D-Type
Pin Count 48
Output Type 3-State
Polarity Non-Inverting
RoHS Status RoHS Compliant
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74LVT16373ADGG,512 Documents

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