ON Semiconductor FDC6312P MOSFETs Transistors Arrays
20V 700mW
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FDC6312P Tech Specifications
| Category | Transistors - FETs, MOSFETs - Arrays | |
| Manufacturer | ON Semiconductor | |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) | |
| Factory Lead Time | 10 Weeks | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | SOT-23-6 Thin, TSOT-23-6 | |
| Number of Pins | 6Pins | |
| Weight | 36mg | |
| Transistor Element Material | SILICON | |
| Number of Elements | 2 Elements | |
| Turn Off Delay Time | 18 ns | |
| Operating Temperature | -55°C~150°C TJ | |
| Packaging | Tape & Reel (TR) | |
| Series | PowerTrench® | |
| Published | 2001 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 6Terminations | |
| Termination | SMD/SMT | |
| ECCN Code | EAR99 | |
| Resistance | 115MOhm | |
| Terminal Finish | Tin (Sn) | |
| Voltage - Rated DC | -20V | |
| Max Power Dissipation | 960mW | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
| Current Rating | -2.3A | |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Qualification Status | Not Qualified | |
| Number of Channels | 2Channels | |
| Element Configuration | Dual | |
| Operating Mode | ENHANCEMENT MODE | |
| Power Dissipation | 960mW | |
| Turn On Delay Time | 8 ns | |
| Power - Max | 700mW | |
| FET Type | 2 P-Channel (Dual) | |
| Transistor Application | SWITCHING | |
| Rds On (Max) @ Id, Vgs | 115m Ω @ 2.3A, 4.5V | |
| Vgs(th) (Max) @ Id | 1.5V @ 250μA | |
| Input Capacitance (Ciss) (Max) @ Vds | 467pF @ 10V | |
| Gate Charge (Qg) (Max) @ Vgs | 7nC @ 4.5V | |
| Rise Time | 13ns | |
| Drain to Source Voltage (Vdss) | 20V | |
| Fall Time (Typ) | 13 ns | |
| Continuous Drain Current (ID) | 2.3A | |
| Threshold Voltage | -900mV | |
| Gate to Source Voltage (Vgs) | 8V | |
| Drain to Source Breakdown Voltage | -20V | |
| Dual Supply Voltage | -20V | |
| FET Technology | METAL-OXIDE SEMICONDUCTOR | |
| Max Junction Temperature (Tj) | 150°C | |
| FET Feature | Logic Level Gate | |
| Nominal Vgs | -900 mV | |
| Height | 1.1mm | |
| Length | 3mm | |
| Width | 1.7mm | |
| REACH SVHC | No SVHC | |
| RoHS Status | ROHS3 Compliant | |
| Lead Free | Lead Free |
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FDC6312P Documents
Download datasheets and manufacturer documentation for FDC6312P
- PCN Design/SpecificationMold Compound 08/April/2008 Logo 17/Aug/2017
- DatasheetsFDC6312P
- Environmental InformationMaterial Declaration FDC6312P
- PCN PackagingBinary Year Code Marking 15/Jan/2014 Mult Devices 24/Oct/2017
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