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- MC100EP105FAR2
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MC100EP105FAR2 Tech Specifications
| Category | Logic - Gates and Inverters - Multi-Function, Configurable | |
| Manufacturer | ON Semiconductor | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 32-LQFP | |
| Number of Pins | 32Pins | |
| Operating Temperature | -40°C~85°C | |
| Packaging | Cut Tape (CT) | |
| Series | 100EP | |
| Published | 2006 | |
| JESD-609 Code | e0 | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) | |
| Number of Terminations | 32Terminations | |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V | |
| Packing Method | TAPE AND REEL | |
| Voltage - Supply | 3V~5.5V | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 240 | |
| Number of Functions | 4Functions | |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.8mm | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | 100EP105 | |
| Pin Count | 32 | |
| Output Type | Differential | |
| Supply Voltage-Max (Vsup) | 5.5V | |
| Supply Voltage-Min (Vsup) | 3V | |
| Number of Circuits | 4Circuits | |
| Propagation Delay | 350 ps | |
| Quiescent Current | 62mA | |
| Logic Function | AND, NAND | |
| Number of Inputs | 2Inputs | |
| Logic Type | 2 Input AND/NAND Gate | |
| High Level Output Current | -50mA | |
| Low Level Output Current | 50mA | |
| Power Supply Current-Max (ICC) | 75mA | |
| Schmitt Trigger Input | No | |
| Length | 7mm | |
| Height Seated (Max) | 1.6mm | |
| Width | 7mm | |
| RoHS Status | Non-RoHS Compliant | |
| Lead Free | Contains Lead |
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MC100EP105FAR2 Documents
Download datasheets and manufacturer documentation for MC100EP105FAR2
- DatasheetsMC10, MC100EP105
- PCN Obsolescence/ EOLMultiple Devices 10/Oct/2012
- ReachStatementON-Semiconductor-company-79.pdf
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