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- NL17SZ125DFT2G
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NL17SZ125DFT2G Tech Specifications
Category | Logic - Buffers, Drivers, Receivers, Transceivers | |
Manufacturer | ON Semiconductor | |
Lifecycle Status | ACTIVE (Last Updated: 2 days ago) | |
Factory Lead Time | 8 Weeks | |
Contact Plating | Tin | |
Mount | Surface Mount | |
Mounting Type | Surface Mount | |
Package / Case | 5-TSSOP, SC-70-5, SOT-353 | |
Number of Pins | 5Pins | |
Operating Temperature | -55°C~125°C TA | |
Packaging | Tape & Reel (TR) | |
Series | 17SZ | |
Published | 2008 | |
JESD-609 Code | e3 | |
Pbfree Code | yes | |
Part Status | Active | |
Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
Number of Terminations | 5Terminations | |
ECCN Code | EAR99 | |
Packing Method | TAPE AND REEL | |
Max Power Dissipation | 150mW | |
Voltage - Supply | 1.65V~5.5V | |
Terminal Position | DUAL | |
Terminal Form | GULL WING | |
Peak Reflow Temperature (Cel) | 260 | |
Number of Functions | 1Function | |
Supply Voltage | 1.8V |
Time@Peak Reflow Temperature-Max (s) | 40 | |
Base Part Number | 17SZ125 | |
Pin Count | 5 | |
Output Type | 3-State | |
Polarity | Non-Inverting | |
Number of Channels | 1Channel | |
Number of Ports | 2Ports | |
Output Current | 32mA | |
Number of Bits | 1Bit | |
Propagation Delay | 10.5 ns | |
Quiescent Current | 1μA | |
Turn On Delay Time | 10.5 ns | |
Family | LVC/LCX/Z | |
Logic Function | Buffer, Inverting | |
Halogen Free | Halogen Free | |
Logic Type | Buffer, Non-Inverting | |
Max I(ol) | 0.024 A | |
Prop. Delay@Nom-Sup | 6 ns | |
Control Type | ENABLE LOW | |
Number of Output Lines | 3Output Lines | |
Schmitt Trigger Input | No | |
Height | 990.6μm | |
Length | 2.1844mm | |
Width | 1.3462mm | |
REACH SVHC | No SVHC | |
RoHS Status | ROHS3 Compliant | |
Lead Free | Lead Free |
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NL17SZ125DFT2G Documents
Download datasheets and manufacturer documentation for NL17SZ125DFT2G
- DatasheetsNL17SZ125
- PCN Design/SpecificationNL17SZyy Series Datasheet 26/Jun/2019 SC88/A Copper Wire 17/Jun/2011
- Environmental InformationMaterial Declaration NL17SZ125DFT2G
- PCN Assembly/OriginWafer Process/Material Update 27/Jul/2016
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