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- SN74LS259DR2
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SN74LS259DR2 Tech Specifications
| Category | Latches, Locks | |
| Manufacturer | ON Semiconductor | |
| ECCN (US) | EAR99 | |
| HTS | 8542.39.00.01 | |
| Logic Family | LS | |
| Latch Mode | Addressable | |
| Number of Channels per Chip | 8Channels per Chips | |
| Number of Elements per Chip | 1 | |
| Number of Inputs per Chip | 1 | |
| Number of Input Enables per Element | 1 | |
| Number of Selection Inputs per Element | 3Selection Inputs per Elements | |
| Number of Outputs per Chip | 8Outputs per Chips | |
| Number of Output Enables per Element | 0 | |
| Bus Hold | No | |
| Set/Reset | Master Reset | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 32@5V | |
| Absolute Propagation Delay Time (ns) | 38 | |
| Process Technology | Bipolar | |
| Maximum Low Level Output Current (mA) | 8 | |
| Maximum High Level Output Current (mA) | -0.4 |
| Minimum Operating Supply Voltage (V) | 4.75 | |
| Typical Operating Supply Voltage (V) | 5 | |
| Maximum Operating Supply Voltage (V) | 5.25 | |
| Propagation Delay Test Condition (pF) | 15 | |
| Minimum Operating Temperature (°C) | 0 | |
| Maximum Operating Temperature (°C) | 70 | |
| Standard Package Name | SOP | |
| Supplier Package | SOIC | |
| Mounting | Surface Mount | |
| Package Height | 1.5(Max) | |
| Package Length | 10(Max) | |
| Package Width | 4(Max) | |
| PCB changed | 16 | |
| Lead Shape | Gull-wing | |
| Packaging | Tape and Reel | |
| Part Status | Obsolete | |
| Type | D-Type | |
| Pin Count | 16 | |
| Polarity | Non-Inverting | |
| RoHS Status | RoHS non-compliant |
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SN74LS259DR2 Documents
Download datasheets and manufacturer documentation for SN74LS259DR2
- datasheetsonsemiconductor-sn74ls259dr2-datasheets-8464.pdf
- Datasheets
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