Silicon Labs SI53305-B-GM Clock Buffers and Drivers
1Circuit 1.8V 1Function
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SI53305-B-GM Tech Specifications
| Category | Clock/Timing - Clock Buffers, Drivers | |
| Manufacturer | Silicon Labs | |
| Factory Lead Time | 6 Weeks | |
| Mounting Type | Surface Mount | |
| Package / Case | 44-VFQFN Exposed Pad | |
| Surface Mount | YES | |
| Number of Pins | 44Pins | |
| Operating Temperature | -40°C~85°C | |
| Packaging | Tray | |
| Published | 1997 | |
| JESD-609 Code | e3 | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) | |
| Number of Terminations | 44Terminations | |
| Type | Fanout Buffer (Distribution), Multiplexer, Translator | |
| Terminal Finish | Matte Tin (Sn) | |
| Additional Feature | IT ALSO REQUIRES 2.5, 3.3 V | |
| Voltage - Supply | 1.71V~3.63V | |
| Terminal Position | QUAD | |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1Function | |
| Supply Voltage | 1.8V | |
| Terminal Pitch | 0.5mm | |
| Frequency | 725MHz | |
| Base Part Number | SI53305 | |
| Output | CML, HCSL, LVCMOS, LVDS, LVPECL | |
| Number of Outputs | 10Outputs | |
| Number of Circuits | 1Circuit | |
| Nominal Supply Current | 100mA | |
| Logic Function | Clock | |
| Input | CML, HCSL, LVCMOS, LVDS, LVPECL | |
| Ratio - Input:Output | 2:10 | |
| Differential - Input:Output | Yes/Yes | |
| Duty Cycle | 52 % | |
| Height | 850μm | |
| Length | 7mm | |
| Width | 7mm | |
| REACH SVHC | Unknown | |
| Radiation Hardening | No | |
| RoHS Status | RoHS Compliant |
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SI53305-B-GM Documents
Download datasheets and manufacturer documentation for SI53305-B-GM
- DatasheetsSi53305
- PCN Design/SpecificationSI5330 Datasheet Rev 10/Apr/2019 Si53305-B-GM 11/May/2018
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