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- 5962-8960101BRA
Teledyne e2v 5962-8960101BRA Flip Flops
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5962-8960101BRA Tech Specifications
| Category | Logic - Flip Flops | |
| Manufacturer | E2V | |
| ECCN (US) | EAR99 | |
| HTS | 8542.39.00.01 | |
| Logic Family | ACT | |
| Number of Channels per Chip | 8Channels per Chips | |
| Number of Elements per Chip | 1 | |
| Number of Element Inputs | 8Element Inputs | |
| Number of Element Outputs | 8Element Outputs | |
| Number of Output Enables per Element | 1 | |
| Bus Hold | No | |
| Triggering Type | Positive-Edge | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 13.5@4.5V | |
| Absolute Propagation Delay Time (ns) | 13.5 | |
| Process Technology | CMOS | |
| Input Signal Type | Single-Ended | |
| Maximum Low Level Output Current (mA) | 24 | |
| Maximum High Level Output Current (mA) | -24 | |
| Minimum Operating Supply Voltage (V) | 4.5 |
| Typical Operating Supply Voltage (V) | 5 | |
| Maximum Operating Supply Voltage (V) | 5.5 | |
| Maximum Quiescent Current (mA) | 3.5 | |
| Propagation Delay Test Condition (pF) | 50 | |
| Minimum Operating Temperature (°C) | -55 | |
| Maximum Operating Temperature (°C) | 125 | |
| Supplier Temperature Grade | Military | |
| Standard Package Name | FPAK | |
| Supplier Package | FPAK | |
| Mounting | Surface Mount | |
| PCB changed | 20 | |
| Lead Shape | Flat | |
| Part Status | Active | |
| Pin Count | 20 | |
| Output Type | 3-State | |
| Polarity | Non-Inverting | |
| Logic Function | D-Type Bus Interface | |
| RoHS Status | RoHS non-compliant |
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5962-8960101BRA Documents
Download datasheets and manufacturer documentation for 5962-8960101BRA
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