5962-9160901MLA(NSC) Tech Specifications

Category Logic - Shift Registers
Manufacturer E2V
ECCN (US) EAR99
Logic Family ACT
Number of Channels per Chip 8Channels per Chips
Number of Elements per Chip 1
Number of Element Inputs 9Element Inputs
Number of Input Enables per Element 0
Number of Selection Inputs per Element 1
Number of Element Outputs 9Element Outputs
Number of Output Enables per Element 1
Bus Hold No
Triggering Type Positive-Edge
Maximum Propagation Delay Time @ Maximum CL (ns) 12@4.5V
Absolute Propagation Delay Time (ns) 15.5
Process Technology CMOS
Input Signal Type Single-Ended
Output Signal Type Single-Ended
Maximum Low Level Output Current (mA) 50
Maximum High Level Output Current (mA) -50
Minimum Operating Supply Voltage (V) 4.5
Typical Operating Supply Voltage (V) 5
Maximum Operating Supply Voltage (V) 5.5
Maximum Quiescent Current (mA) 0.16
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -55
Maximum Operating Temperature (°C) 125
Supplier Temperature Grade Military
Standard Package Name DIP
Supplier Package CDIP
Mounting Through Hole
Package Height 4.57(Max)
Package Length 32.77(Max)
Package Width 7.49(Max)
PCB changed 24
Lead Shape Through Hole
Part Status Active
Pin Count 24
Output Type 3-State
Polarity Non-Inverting
Logic Function Diagnostic Register
RoHS Status RoHS non-compliant
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