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TC74ACT573P Tech Specifications

Category Latches, Locks
Manufacturer Toshiba
ECCN (US) EAR99
Logic Family ACT
Latch Mode Transparent
Number of Channels per Chip 8Channels per Chips
Number of Elements per Chip 1
Number of Inputs per Chip 8Inputs per Chips
Number of Input Enables per Element 1
Number of Selection Inputs per Element 0
Number of Outputs per Chip 8Outputs per Chips
Number of Output Enables per Element 1
Bus Hold No
Set/Reset No
Maximum Propagation Delay Time @ Maximum CL (ns) 9.6@5V
Absolute Propagation Delay Time (ns) 12
Process Technology CMOS
Maximum Low Level Output Current (mA) 24
Maximum High Level Output Current (mA) -24
Minimum Operating Supply Voltage (V) 4.5
Typical Operating Supply Voltage (V) 5
Maximum Operating Supply Voltage (V) 5.5
Maximum Quiescent Current (uA) 8
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 85
Standard Package Name DIP
Supplier Package PDIP
Mounting Through Hole
Package Height 3.5
Package Length 25.1(Max)
Package Width 6.4
PCB changed 20
Lead Shape Through Hole
Packaging Magazine
Part Status Obsolete
Type D-Type
Pin Count 20
Output Type 3-State
Polarity Non-Inverting
RoHS Status RoHS Compliant
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TC74ACT573P Documents

Download datasheets and manufacturer documentation for   TC74ACT573P

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