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TC7PA17FU(BRA,F) Tech Specifications
| Category | Logic - Specialty Logic | |
| Manufacturer | Toshiba | |
| ECCN (US) | EAR99 | |
| Logic Family | VCX | |
| Number of Elements per Chip | 2Elements per Chips | |
| Number of Channels per Chip | 2Channels per Chips | |
| Number of Inputs per Chip | 2Inputs per Chips | |
| Number of Input Enables per Chip | 0 | |
| Number of Outputs per Chip | 2Outputs per Chips | |
| Number of Output Enables per Chip | 0 | |
| Bus Hold | No | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 8.6@1.8V|4@3.3V|4.3@2.5V | |
| Absolute Propagation Delay Time (ns) | 8.6 | |
| Process Technology | CMOS | |
| Input Signal Type | Single-Ended | |
| Maximum Low Level Output Current (mA) | 24 | |
| Maximum High Level Output Current (mA) | -24 | |
| Minimum Operating Supply Voltage (V) | 1.8 | |
| Typical Operating Supply Voltage (V) | 2.5|3.3 |
| Maximum Operating Supply Voltage (V) | 3.6 | |
| Tolerant I/Os (V) | 3.6 | |
| Maximum Quiescent Current (uA) | 20 | |
| Propagation Delay Test Condition (pF) | 30 | |
| Maximum Power Dissipation (mW) | 200 | |
| Minimum Operating Temperature (°C) | -40 | |
| Maximum Operating Temperature (°C) | 85 | |
| Supplier Package | US | |
| Mounting | Surface Mount | |
| Package Height | 0.9 | |
| Package Length | 2 | |
| Package Width | 1.25 | |
| PCB changed | 6 | |
| Part Status | Obsolete | |
| Pin Count | 6 | |
| Polarity | Non-Inverting | |
| Logic Function | Schmitt Trigger Buffer | |
| RoHS Status | RoHS Compliant |
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TC7PA17FU(BRA,F) Documents
Download datasheets and manufacturer documentation for TC7PA17FU(BRA,F)
- datasheetstoshiba-tc7pa17fubraf-datasheets-1684.pdf
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