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TC7SET02FU(BRA,JF) Tech Specifications
| Category | Logic - Gates and Inverters | |
| Manufacturer | Toshiba | |
| ECCN (US) | EAR99 | |
| Logic Family | VHCT | |
| Number of Elements per Chip | 1 | |
| Number of Element Inputs | 2-INElement Input | |
| Number of Output Enables per Element | 0 | |
| Number of Selection Inputs per Element | 0 | |
| Number of Element Outputs | 1Element Output | |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 9@5V | |
| Absolute Propagation Delay Time (ns) | 10.3 | |
| Process Technology | CMOS | |
| Maximum Low Level Output Current (mA) | 8 | |
| Maximum High Level Output Current (mA) | -8 | |
| Minimum Operating Supply Voltage (V) | 4.5 | |
| Typical Operating Supply Voltage (V) | 5 |
| Maximum Operating Supply Voltage (V) | 5.5 | |
| Maximum Quiescent Current (uA) | 2 | |
| Propagation Delay Test Condition (pF) | 50 | |
| Minimum Operating Temperature (°C) | -40 | |
| Maximum Operating Temperature (°C) | 85 | |
| Supplier Package | USV | |
| Mounting | Surface Mount | |
| Package Height | 0.9 | |
| Package Length | 2 | |
| Package Width | 1.25 | |
| PCB changed | 5 | |
| Lead Shape | Gull-wing | |
| Part Status | Obsolete | |
| Pin Count | 5 | |
| Logic Function | NOR | |
| RoHS Status | RoHS Compliant |
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TC7SET02FU(BRA,JF) Documents
Download datasheets and manufacturer documentation for TC7SET02FU(BRA,JF)
- datasheetstoshiba-tc7set02fute85lf-datasheets-4983.pdf
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