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- XC2C256-7VQG100I
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XC2C256-7VQG100I Tech Specifications
Category | Embedded - CPLDs (Complex Programmable Logic Devices) | |
Manufacturer | Xilinx | |
Factory Lead Time | 10 Weeks | |
Mounting Type | Surface Mount | |
Package / Case | 100-TQFP | |
Mount | Surface Mount | |
Contact Plating | Tin | |
Number of Pins | 100Pins | |
Number of I/Os | 80I/Os | |
Operating Temperature | -40°C~85°C TA | |
Packaging | Tray | |
Series | CoolRunner II | |
Published | 2001 | |
JESD-609 Code | e3 | |
Pbfree Code | yes | |
Part Status | Active | |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
Number of Terminations | 100Terminations | |
ECCN Code | EAR99 | |
Additional Feature | REAL DIGITAL DESIGN TECHNOLOGY | |
HTS Code | 8542.39.00.01 | |
Terminal Position | QUAD | |
Terminal Form | GULL WING | |
Peak Reflow Temperature (Cel) | 260 | |
Supply Voltage | 1.8V |
Terminal Pitch | 0.5mm | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Base Part Number | XC2C256 | |
Pin Count | 100 | |
Qualification Status | Not Qualified | |
Operating Supply Voltage | 1.8V | |
Programmable Type | In System Programmable | |
Max Supply Voltage | 1.9V | |
Min Supply Voltage | 1.7V | |
Propagation Delay | 7.5 ns | |
Turn On Delay Time | 7.5 ns | |
Number of Logic Elements/Cells | 16Logic Elements/Cells | |
Number of Gates | 6000Gates | |
Max Frequency | 152MHz | |
Speed Grade | 7 | |
Output Function | MACROCELL | |
Number of Macro Cells | 256Macro Cells | |
JTAG BST | YES | |
Voltage Supply - Internal | 1.7V~1.9V | |
Delay Time tpd(1) Max | 6.7ns | |
Height Seated (Max) | 1.2mm | |
Length | 14mm | |
Width | 14mm | |
RoHS Status | ROHS3 Compliant |
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XC2C256-7VQG100I Documents
Download datasheets and manufacturer documentation for XC2C256-7VQG100I
- DatasheetsXC2C256 Datasheet CoolRunner-II CPLD Family
- PCN Assembly/OriginMult Dev LeadFrame Chg 29/Oct/2018
- Environmental InformationXilinx RoHS3
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