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- XC5VLX30T-1FFG665C
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XC5VLX30T-1FFG665C Tech Specifications
Category | Embedded - FPGAs (Field Programmable Gate Array) | |
Manufacturer | Xilinx | |
Factory Lead Time | 10 Weeks | |
Mount | Surface Mount | |
Mounting Type | Surface Mount | |
Package / Case | 665-BBGA, FCBGA | |
Number of Pins | 665Pins | |
Number of I/Os | 360I/Os | |
Operating Temperature | 0°C~85°C TJ | |
Packaging | Tray | |
Series | Virtex®-5 LXT | |
Published | 1999 | |
JESD-609 Code | e1 | |
Pbfree Code | yes | |
Part Status | Active | |
Moisture Sensitivity Level (MSL) | 4 (72 Hours) | |
Number of Terminations | 665Terminations | |
Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) | |
Voltage - Supply | 0.95V~1.05V | |
Terminal Position | BOTTOM | |
Terminal Form | BALL | |
Peak Reflow Temperature (Cel) | 250 |
Supply Voltage | 1V | |
Reach Compliance Code | not_compliant | |
Frequency | 1.098GHz | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Base Part Number | XC5VLX30 | |
Pin Count | 665 | |
Number of Outputs | 360Outputs | |
Qualification Status | Not Qualified | |
Voltage | 1V | |
RAM Size | 162kB | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Number of Logic Elements/Cells | 30720Logic Elements/Cells | |
Total RAM Bits | 1327104 | |
Number of Gates | 30000Gates | |
Number of LABs/CLBs | 2400LABs/CLBs | |
Speed Grade | 1 | |
Number of Macro Cells | 4800Macro Cells | |
Height | 2.4mm | |
Length | 27mm | |
Width | 27mm | |
REACH SVHC | Unknown | |
RoHS Status | ROHS3 Compliant |
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XC5VLX30T-1FFG665C Documents
Download datasheets and manufacturer documentation for XC5VLX30T-1FFG665C
- DatasheetsVirtex-5 Family Overview Virtex-5 FPGA Datasheet Virtex-5 FPGA User Guide XC5VLX30T-1FFG665C-Xilinx-datasheet-6396844.pdf XC5VLX30T-1FFG665C-Xilinx-datasheet-14104753.pdf XC5VLX30T-1FFG665C-Xilinx-datasheet-41487006.pdf
- Environmental InformationXilinx RoHS3
- PCN Design/SpecificationSubstrate BallPad Metal Change 8/Feb/2016 Cross-Ship Lead-Free Notice 31/Oct/2016 Mult Dev Material Chg 16/Dec/2019
- PCN PackagingVirtex-5, SXT FPGA 11/March/2008
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