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- XC5VLX50T-1FFG1136C
Xilinx Inc. XC5VLX50T-1FFG1136C Embedded FPGAs
50000Gates FIELD PROGRAMMABLE GATE ARRAY 480Outputs
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XC5VLX50T-1FFG1136C Tech Specifications
| Category | Embedded - FPGAs (Field Programmable Gate Array) | |
| Manufacturer | Xilinx | |
| Factory Lead Time | 10 Weeks | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 1136-BBGA, FCBGA | |
| Number of Pins | 1136Pins | |
| Number of I/Os | 480I/Os | |
| Operating Temperature | 0°C~85°C TJ | |
| Packaging | Tray | |
| Series | Virtex®-5 LXT | |
| Published | 1999 | |
| JESD-609 Code | e1 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 4 (72 Hours) | |
| Termination | SMD/SMT | |
| Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) | |
| Voltage - Supply | 0.95V~1.05V | |
| Terminal Position | BOTTOM | |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 245 | |
| Supply Voltage | 1V | |
| Reach Compliance Code | not_compliant | |
| Frequency | 550MHz | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | XC5VLX50 | |
| Number of Outputs | 480Outputs | |
| Qualification Status | Not Qualified | |
| RAM Size | 270kB | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Number of Logic Elements/Cells | 46080Logic Elements/Cells | |
| Total RAM Bits | 2211840 | |
| Number of Gates | 50000Gates | |
| Number of LABs/CLBs | 3600LABs/CLBs | |
| Speed Grade | 1 | |
| Height | 2.8mm | |
| Length | 35mm | |
| Width | 35mm | |
| REACH SVHC | No SVHC | |
| RoHS Status | ROHS3 Compliant |
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XC5VLX50T-1FFG1136C Documents
Download datasheets and manufacturer documentation for XC5VLX50T-1FFG1136C
- DatasheetsVirtex-5 Family Overview Virtex-5 FPGA Datasheet Virtex-5 FPGA User Guide XC5VLX50T-1FFG1136C-Xilinx-datasheet-6396844.pdf XC5VLX50T-1FFG1136C-Xilinx-datasheet-14104753.pdf XC5VLX50T-1FFG1136C-Xilinx-datasheet-41487006.pdf
- Environmental InformationXilinx RoHS3
- PCN Design/SpecificationSubstrate BallPad Metal Change 8/Feb/2016 Cross-Ship Lead-Free Notice 31/Oct/2016 Mult Dev Material Chg 16/Dec/2019
- PCN PackagingVirtex-5, SXT FPGA 11/March/2008
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