Zilog Z8018006PEG Embedded Microprocessors
64Terminations Z180 Tube
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Z8018006PEG Tech Specifications
| Category | Embedded - Microprocessors | |
| Manufacturer | IXYS Zilog | |
| Mount | Through Hole | |
| Package / Case | 64-DIP (0.750, 19.05mm) | |
| Number of Pins | 64Pins | |
| Memory Types | ROMless | |
| ROM(word) | 0 | |
| Operating Temperature | -40°C~100°C TA | |
| Packaging | Tube | |
| Series | Z180 | |
| Published | 2006 | |
| JESD-609 Code | e3 | |
| Pbfree Code | yes | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 64Terminations | |
| Terminal Finish | MATTE TIN | |
| Terminal Position | DUAL | |
| Supply Voltage | 5V | |
| Terminal Pitch | 1.778mm | |
| Frequency | 6MHz | |
| Pin Count | 64 | |
| Operating Supply Voltage | 5V | |
| Voltage | 5V | |
| Interface | SCI, UART | |
| RAM Size | 64kB | |
| uPs/uCs/Peripheral ICs Type | MICROCONTROLLER |
| Core Processor | Z80180 | |
| Bit Size | 8 | |
| Has ADC | NO | |
| DMA Channels | YES | |
| Data Bus Width | 8b | |
| PWM Channels | NO | |
| DAC Channels | NO | |
| Number of Timers/Counters | 2Timers/Counters | |
| Address Bus Width | 20 | |
| Boundary Scan | NO | |
| Low Power Mode | YES | |
| Format | FIXED POINT | |
| Integrated Cache | NO | |
| RAM (words) | 0 | |
| Voltage - I/O | 5.0V | |
| Number of Cores/Bus Width | 1 Core 8-Bit | |
| Graphics Acceleration | No | |
| RAM Controllers | DRAM | |
| Additional Interfaces | ASCI, CSIO, UART | |
| Number of Serial I/Os | 3Serial I/Os | |
| Number of External Interrupts | 4External Interrupts | |
| Number of DMA Channels | 2DMA Channels | |
| Length | 57.785mm | |
| Height Seated (Max) | 5.01mm | |
| RoHS Status | ROHS3 Compliant | |
| Lead Free | Lead Free |
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Z8018006PEG Documents
Download datasheets and manufacturer documentation for Z8018006PEG
- PCN Obsolescence/ EOL48/64 DIP EOL 04/Jun/2015
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